Presentation: High temperature performance of next generation 1200 V SiC MOSFET die with advanced packaging technology
Speaker: Amy Romero
Date: Thursday, May 12, 2022 at 10:10 AM CET
Room: Brüssel 1
Abstract: The combination of high power capable SiC MOSFETs with advanced packaging can lead to very high-power densities, creating the challenge of having a reliable design that can not only withstand high power stresses but also high temperature conditions. This paper addresses that concern with the first ever integration of a newly developed 1200 V, 14 mΩ, 25 mm2 SiC MOSFET with a sintered die attach and copper top side solution which allows for copper wire bonds. Both die and package level technology qualification results are shown including successful High Temperature Reverse Bias (HTRB), High Temperature Gate Bias (HTGB) and power cycling tests, all up to 200 °C and High Voltage High Humidity, High Temperature Reverse Bias Test (HV-H3TRB). Post-stress physical analysis is also shown.