RF and Microwave Research Group
University College Dublin, Ireland
Abstract - This work outlines a design approach used for achieving highly efficient power amplification over a wide bandwidth, given narrowband passive harmonic load-pull results at a single center frequency. Specific considerations have been given to harmonic suppression concerns which are addressed by appropriate choice of matching network topology. The method is justified by amplifier fabrication using a commercially available 10W GaN HEMT transistor and achieving an efficiency of at least 60% over a 15% bandwidth from 2.3-2.7GHz. Output power between 10-12W was delivered across the band, centered at 2.5GHz. Harmonic suppression of at least -41dBc and -39dBc was obtained across the second and third harmonic bands respectively, largely removing the dependency on post-filtering.
Index Terms - Class-J, harmonic suppression, high efficiency, power amplifier.
The ever increasing demand for greater data rates coupled with stringent spectral mask requirements and the need for low power consumption provides severe challenges in the field of PA design. Switch-mode amplifiers have been shown to present high efficiency, although usually at the expense of linearity and/or bandwidth. Recently, the Class-J amplifier has been proposed , which provides a solution for the adverse effects of switch-mode amplification, therefore potentially exhibiting high efficiency, linearity and wideband behavior simultaneously.
Class-J theory augments the traditional narrowband harmonic shorting approach associated with conventional linear amplifier modes, by allowing a reactive fundamental component and reactive terminations at the harmonics. This permits a wide range of solutions for a given set of harmonic terminations which can be utilized to obtain high efficiency across the band of interest . Wright et al.  demonstrated at least 60% efficiency over a 50% bandwidth with Wu et al.  obtaining greater than 60% efficiency over a 42% bandwidth.
The nature of wideband amplifiers implies a difficulty in suppression of the harmonics associated with the in-band frequencies, as a near overlap of the bands can occur. These harmonic bands could be suppressed by a high order filter at the output but this will be accompanied by a reduction in the output fundamental power and therefore a substantial decrease in the effective efficiency of the amplifier. Alternatively, harmonic filtering can be integrated into the output matching network but this typically results in raising the network Q-factor for appropriate harmonic rejection at the load. A reduction of the PA bandwidth then ensues, which suggests a practical limit for the available bandwidth given a desired level of load harmonic band suppression.
This work demonstrates an approach used for obtaining moderately wide PA bandwidths with /4 narrowband harmonic load-pull tuner results, and discusses the topological considerations employed for obtaining adequate harmonic suppression over the entire 2nd and 3nd harmonic bands. Device output package and intrinsic de-embedding has been applied to obtain a representation of the impedances presented to the internal current generator. The design procedure first identifies the efficiency contours over the normalized fundamental and 2nd harmonic reactive plane at the intrinsic device. This provides a design space for determining a suitable fundamental frequency termination given the harmonic terminations seen at the intrinsic drain. Independent control of the harmonic and fundamental matching networks is essential for realizing a solution to the design specifications and providing a systematic design approach.
By employing the design space technique combined with the narrowband harmonic load-pull measurements, an amplifier was fabricated using a 10W Wolfspeed GaN HEMT device. Results obtained demonstrate the feasibility of the approach by delivering at least 10W of output power with greater than 60% drain efficiency across 2.3-2.7GHz. Across the bandwidth, measurements revealed harmonic suppression in excess of -39dBc over the 2nd and 3nd harmonic bands at the load. Finally, measurements are shown which display the potential of the amplifier for incorporation within high efficiency drain modulated transceiver architectures.
II. CLASS-J AMPLIFIER THEORY
Class-J amplification is characterized by a complex fundamental impedance combined with reactive harmonic terminations at the intrinsic drain of the device. It has been shown [ 1 ] that such a configuration can deliver power and efficiency equivalent to the Class-B case. The consequence of adding a reactive fundamental component and reactive harmonic terminations manifests itself as an increase in the magnitude of the internal drain voltage waveform. Waveform engineering solutions also exist, which can exploit the non-linearities within the device to optimize performance . By only considering the 2nd and 3rd harmonics, the normalized intrinsic drain voltage waveform can be expressed as follows:
Conforming to the criteria outlined by Rhodes , a family of solutions can be exploited by updating the fundamental reactive component for a set of harmonic terminations dynamically changing across frequency. Fig.1 shows the efficiency degradation with increasing 2nd harmonic reactive termination for different modes of operation. The plot utilizes optimum fundamental and 3rd harmonic reactive terminations for maximizing efficiency while ensuring no harmonic power consumption.
In practice, difficulty arises in designing a matching network to avail of the improved performance with 3rd harmonic enhancement across a wide bandwidth. Provided the normalized 2nd harmonic reactance does not exceed a value of approximately 1.5 (c = 0.5), maximum efficiency can still be maintained and thus there would be no gain in control of the 3rd harmonic. It is therefore desirable to provide minimal impedance across the 3rd harmonic band otherwise it may further increase the amplitude of the drain voltage and drive the device into breakdown. The effect of presenting a low impedance 3rd harmonic termination will introduce a 3rd harmonic current component and distort the ideal half-sinusoidal current waveform. This was considered in final efficiency calculations for strong correlation between measurement and simulated results.
III. CLASS-J AMPLIFIER DESIGN METHODOLOGY
Considering only the 2nd harmonic, the efficiency contours can map out a design space in the X1, X2 reactance plane as shown in Fig.3. The key feature of the approach taken in this work is the isolation of the harmonic and fundamental matching networks for reducing the complexity of the design procedure. By presenting high impedance to harmonics at plane C (Fig.2) the harmonic terminations are completely determined by the device and the harmonic matching network. This ability for independent harmonic and fundamental network design allows for superior control in achieving high efficiency, wideband amplification with full suppression of the harmonic bands.
Narrowband passive harmonic load-pull was performed on the device to determine the optimum impedances at the center frequency and the harmonics. The theory presented was utilized by initially designing a harmonic matching network which restrained the 2nd harmonic reactances to within the high efficiency contour regions. The fundamental network was then designed by trade-off between preserving the high efficiency trajectory, maximizing harmonic load rejection and maintaining at least 10W of output power.
A. Harmonic Matching Network Design
The harmonic load network is composed of the device intrinsic model and package parasitics terminated in a harmonic matching network. The design criteria for the harmonic matching network are outlined below:
1) From (1), |c| ≤ 0.5 (= X2/R1 ≤1.5) to remain in the high efficiency region.
2) The fundamental impedance transformation must act to have minimal effect on the obtainable bandwidth.
3) Harmonic terminations at plane A must be highly reactive to ensure no power generated at the harmonics.
4) |d| must be small enough to have a negligible effect on efficiency with little variation over frequency, so as to be effectively neglected at plane A.
Passive harmonic load-pull was initially implemented to find the optimum impedances at Plane B which can then be de-embedded to Plane A. The appropriate topology which satisfied the above criteria is shown in Fig.4. Lumped surface mount components were used for their superior bandwidth performance over stubs and the application of an inductor as a DC feed provides a preferable alternative to a narrowband quarter-wave transmission line.
B. Fundamental Matching Network Design
The function of the fundamental matching network was to provide the appropriate fundamental impedance at plane A over the band while presenting large harmonic band impedances. The fundamental matching network was designed by adhering to the following criteria:
1) The fundamental complex impedance presented at plane A should not allow the efficiency contour trajectory to go below 60% over the band of interest.
2) Fundamental power delivered to the load should be at least 40dBm over the desired band.
3) High impedance should be presented at plane C to the 2nd and 3rd harmonics over the entire harmonic bands to allow independent harmonic control.
4) Greater than -35dBc of e and 3rd harmonic suppression should be obtained at the load.
For the design of the fundamental matching network 3D electromagnetic simulations were utilized for accurate prediction of the harmonic impedances. Criteria 3) and 4) can be treated simultaneously, since meeting 3) with sufficiently high harmonic impedance terminations should imply 4) is satisfied. A trade-off then becomes evident as meeting criteria 3) and 4) tends to reduce the bandwidth of the fundamental match hence compromising criterion 2). Upon satisfying criteria 3) and 4), the trajectory can be plotted on the reactance plane by de-embedding the impedances to plane A to test for 1) and 2). Results of the final complete output matching network trajectory are shown in Fig.5
C. Input Matching Network Design
For obtaining the optimum source impedance, source-pull was performed at the center frequency of 2.5GHz. The initial approach was to match at the center frequency and provide minimal variation in impedance around the band. This procedure was justified by performing fundamental source-pull over the band and observing small variations in the optimum source impedance. Harmonic source-pull was not available so the input match was designed to provide maximum gain over the band while filtering the harmonic bands. A capacitor was included in the network for flexibility in tuning. The complete amplifier schematic is shown in Fig 4.
IV. MEASUREMENT RESULTS
The final fabricated amplifier is shown in Fig.6. Continuous Wave (CW) excitation was employed for testing from 2.3- 2.7GHz, corresponding to a 15% bandwidth. Drain efficiency, PAE, output power and harmonic power were calculated at 25MHz intervals across the band. Results are demonstrated in Fig.7 and Fig.9.
Output power at the fundamental varies from 10 to 12W. Greater than 60% efficiency was obtained over the band with an average drain efficiency just over 62%. Over the second harmonic band of 4.6-5.4GHz at least -44dBc of harmonic suppression was obtained with at least -39dBc over the 3rd harmonic band of 6.9-8.1GHz. Over the initial 10% design bandwidth at least -47dBc and -41dBc of harmonic rejection was found over the 2nd and 3rd harmonic bands respectively.
The simulated efficiency curve in Fig.9 shows strong agreement with the measured drain efficiency due to the inclusion of a 3rd harmonic current component. For drain modulation considerations, a single tone power sweep was performed across a range of drain bias voltages. Fig.8 illustrates the potential for dynamic drain modulation by providing peak efficiency of 74% with >70% efficiency over a 9dB output power range at 2.65GHz.
A wideband Class-J amplifier was designed and fabricated based on single frequency harmonic load-pull results. Harmonic suppression concerns were also addressed and a systematic design methodology has been constructed for meeting the demanding design goals. Results demonstrate at least 60% efficiency over a 15% bandwidth with in excess of -39dBc of 3rd harmonic and -44dBc of 2nd harmonic band rejection at the load. Potential viability for integration within high efficiency EER/ET systems was demonstrated with >70% efficiency over a 9dB output power range.
The authors would like to thank Wolfspeed, Inc. for supplying the device and device models. Also, the authors would like to acknowledge the financial support of Science Foundation Ireland.
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