Gallium nitride (GaN) is the clear choice for applications that require high-frequency operation (high Fmax), high power density and high efficiency. Compared with silicon, it’s 3x band gap of 3.4 eV, 20x critical electric field breakdown of 3.3 MV/cm, and 1.3x electron mobility of 2,000 cm2/V•s mean that GaN RF high electron mobility transistors (HEMTs) have a much smaller size for the same RDS(ON) and breakdown voltage as a silicon-based device. GaN RF HEMTs are therefore going beyond cellular base stations and military radars, and capturing applications across all RF market segments.
Many of these applications require very long lifetimes with typical military and telecoms use cases demanding more than 10 years of operation. The reliability of high-power GaN HEMTs is driven by the peak temperatures within the base semiconductor technology. To maximize lifetime and performance of GaN-based amplifier systems, designers must fully understand the thermal environment as well as its limitations.
Junction temperature & reliability
The industry standard indicator for measuring semiconductor device reliability is Mean Time To Failure (MTTF), which is a statistical method of estimating how long it would take for a single device to fail when a given sample of devices are tested over a certain period of time. The longer it takes for a single device in the sample to fail, the higher the MTTF is often expressed in years.
Junction temperature Tj, or the temperature of the base semiconductor in the device, plays an important role in device reliability as does the substrate material in keeping the base semiconductor cool. Compared with silicon’s thermal conductivity of 120 W/mK, silicon carbide’s (SiC) thermal conductivity of 430 W/mK that degrades slower with temperature makes the latter material ideal for use with GaN. For a similar transistor layout, 60 W dissipation and 100μm die thickness, GaN on SiC runs 19°C cooler & and so has a longer MTTF — than does GaN on Si.1,2
Wolfspeed generates a curve of MTTF vs junction temperatures by stressing GaN HEMTs under DC operating conditions up to junction temperatures of 375°C. The peak junction temperature correlates directly to MTTF with all of Wolfspeed’s GaN technology showing an MTTF of greater than 10 years at the peak junction temperature of 225°C.
GaN junction & surface temperatures
During a GaN HEMT’s operation, peak temperature is reached within the GaN channel or junction where electrons flow from the drain to the source. This junction temperature cannot be measured directly because it is obstructed by metal layers (Figure 1).
What can be measured using Infrared (IR) microscopy is the device surface temperature which, however, is lower than the junction temperature. The use of finite element analysis (FEA) allows for the creation of accurate channel-to-surface temperature differentials, from which the junction-to-case thermal resistance) can be calculated. A Finite Element Method (FEM) simulation thus enables us to correlate the IR surface measurement down to the junction.3
A physical model is created in the Ansys software in a way that mirrors the hardware used in the IR measurement system. This includes a boundary condition of 75°C for the bottom of the device fixture in order to match IR imaging conditions. The software sections the models using physical symmetry to reduce computational resources and simulation time (Figure 2).
The IR camera at 5x magnification has a resolution of about 7μm whereas the channel generating the heat is less than 1μm in width and is buried under several layers of other material. Therefore, what the IR camera measures is a spatial average (Figure 3). This produces data that is significantly lower in value than the actual peak junction temperature. For instance, when the spatial average temperature over 7μm is 165°C, the peak junction temperature could be as high as 204°C.
Calculating thermal resistance
The difference in temperatures between the junction and the case is due to thermal resistance and is obtained by multiplying the amount of heat transferred from the junction to the case by the junction-to-case thermal resistance. Equation 1 below describes thermal resistance as the difference in temperature (ΔT) between two surfaces in space that support a fixed heat flow (q).4
This relationship allows Wolfspeed to calculate the peak junction temperature and determine the MTTF of the device under test (DUT).
The FEM thermal simulation is used to extract the thermal resistance, Rθjc. The temperature of the bottom side of the package flange is held at a fixed value, Tc, and a fixed DC power, Pdiss, is dissipated in the GaN HEMT. The temperature difference is calculated between the junction (Tj) and the back of the package flange (Tc), as shown in equation 2.
The thermal resistance can be calculated as follows.
However, many systems using GaN on SiC HEMTs are operated in pulsed modulation modes instead of continuous-wave (CW) mode. It is important to understand how thermal resistance changes in response to transients defined by pulse width and duty cycle so that the correct Rθjc value is applied to your application.
To capture the innumerable combinations of pulse widths and duty cycles, a plot of thermal resistance for several duty cycles against pulse length on a logarithmic scale is used (Figure 4).
Device mounting considerations
The interface between the high-power transistor and the rest of the system holds the key to long-term reliability, as it introduces additional thermal resistances that designers must consider at the system level (Equation 4).
Where Raj is the ambient-to-junction thermal resistance, Rint is the interface resistance and Rhs is the heatsink-to-ambient thermal resistance.
Wolfspeed recommends soldering packaged GaN devices for best thermal performance. An Indium foil can be alternatively used as a thermal interface material, but the correct foil thickness must be chosen to avoid stressing the flange. It is necessary to not over-torque the flange mount beyond the maximum value stated on the datasheet.5,6
Using the datasheet to calculate Tj
Take the example of Wolfspeed’s CG2H30070F-AMP GaN HEMT for 0.5 GHz - 3.0 GHz running a CW application at 25°C case temperature. The performance data in the component’s datasheet (Table 1) allows for the calculation of the highest dissipated power, as shown in Equations 5 and 6.
Typical Performance Over 0.5 - 3.0 GHz (Tc = 25°C)
Small Signal Gain (S21)
Gain @ Pin= 39 dBm
Output Power @ Pin= 39 dBm
Efficiency @ Pin= 39 dBm
Note: Operating conditions are CW
Plugging the information from the datasheet into a spreadsheet software — frequency, Pout (dBm), Efficiency (%), Pout (W), Pin (W), and Pdc (W) — enables quick calculation of Pdiss (W) and the selection of the highest Pdiss, which in the case of our example is 79.8 W or ~80 W at 1.5 GHz.
Referring to the datasheet, we find that this corresponds to a CW thermal resistance, Rθjc, of 1.5°C/W. The peak junction temperature can now be calculated as in equation 7.
Using the values, Tc = 25°C, Pdiss = 80 W, and Rθjc = 1.5°C/W, gives us Tj = 145°C
The use of RF GaN is increasing at a rapid clip in military and commercial radar applications, and LTE and 5G deployments. These applications require design with reliability in mind.
High-power GaN HEMT reliability depends on peak junction temperatures and it is increasingly important for engineers to understand how to design in the latest GaN HEMTs to meet their design reliability goals.
- Thermal Analysis and its application to High Power GaN HEMT Amplifiers (https://www.wolfspeed.com/knowledge-center/article/thermal-considerations-for-high-power-gan-rf-amplifiers/)
- Silicon Thermal Properties (http://www.ioffe.ru/SVA/NSM/Semicond/Si/thermal.html)
- Thermal Performance Guide for High Power SiC MESFET and GaN HEMT Transistors (https://assets.wolfspeed.com/uploads/2021/06/Appnote%252010.pdf)
- Thermal Resistance and Thermal Conductance (https://ctherm.com/resources/helpful-links-tools/thermalresistanceandconductivity/)
- Indium Mounting Procedure (https://cms.wolfspeed.com/app/uploads/2020/12/Indium_Mounting_Procedure.pdf)
- Eutectic Die Bond Procedure (https://cms.wolfspeed.com/app/uploads/2020/12/Appnote-2-Eutectic.pdf)