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RF Power Amplification 101: Handling Non-Idealities

Oct 12, 2021
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RF Power Amplification 101: Handling Non Idealities

When amplifiers are introduced in any basic tutorial, the discussion often assumes ideal transistors are being used. Their characteristics comprise linear transconductance or linear variation of the drain-to-source current (Ids) with gate-to-source voltage (Vgs) with strong nonlinearity or abruptness when the limiting condition of pinch off is reached at the threshold voltage Vt or hard saturation is reached at Imax (Figure 1).

Figure 1: Transfer characteristics of an ideal transistor.
Figure 1: Transfer characteristics of an ideal transistor.

This strongly nonlinear transconductive device is thus a voltage-controlled current source with zero output conductance as well as zero turn-on voltage.

The previous two articles in this series on RF power amplifier (PA) basics made such assumptions both to classify amplifiers based on gate bias and calculate their best-case efficiencies. If these assumptions were to form the basis of selecting amplifier mode of operation or gate biasing, engineers would indeed be in for a surprise from actual designs.

The third and final part in this series takes real-world waveforms and transistor behavior into account as it revisits gate biasing and efficiency.

The 3 key non-idealities

The previous article demonstrated how 100% efficiency could be achieved with some linearity traded off by implementing a class F or inverse F amplifier. And there the search for the perfect choice of RF PA operation could have ended had it not been for main three non-idealities.

The first is related to our assumption of a perfect square waveform generated by the addition of the third harmonic. In reality, a square wave is only possible with the addition of an infinite number of odd harmonics as was discussed in the first article. Adding the third harmonic has a significant effect in shaping the waveform but does not result in the ideal square waveform that was earlier assumed. And this has efficiency costs (Figure 2).

Figure 2: Each non-ideality makes a significant dent in the class F efficiency.
Figure 2: Each non-ideality makes a significant dent in the class F efficiency.

The next non-ideality is the presence of a knee voltage. As shown in the output characteristics in Figure 2, the drain-to-source current IDS varies linearly with VDS after turn-on and until saturation. In the current saturation region, ideally, VDS changes have no effect on IDS, which only changes with the gate-to-source voltage VGS. The curve, however, goes through a “knee” before flattening out.

The knee limits or shortens the dynamic load-line swing, affecting both the current and the voltage, and thus reducing the RF output power. This, in turn, makes another dent in the class B and F efficiency.

This third non-ideality is the “soft” turn-on. The turn-on behavior of the transistor is not abrupt, which is the result of the transistor exhibiting nonlinear transconductance when a given threshold gate voltage is exceeded. This soft turn-on increases the conduction angle in the drain current compared to the ideal (abrupt) turn-on for the same given VGS bias (Figure 2).

The main drawback of the soft turn-on is gain expansion and requires some efficiency to be traded off to avoid the amplitude-to-amplitude (AM-AM) distortion described below.

The impact on gain and AM-AM distortion

Recall that class F uses half-wave rectification or class B operation for the drain current. This is achieved by biasing the gate at threshold, earlier assumed at 0 V. The soft turn-on characteristic moves the pinch-off point left (Figure 3).

Figure 3: There is a significant non-linear gain expansion due to the soft turn-on characteristics.
Figure 3: There is a significant non-linear gain expansion due to the soft turn-on characteristics.

Another issue to consider is that turn-on is followed by a region of significant gain expansion (Figure 3, right). It is but intuitive to want gain flatness from amplifiers because variations in gain can cause signal distortion where various “parts” of an input signal get amplified by different “amounts.”

This AM-AM distortion and how it changes with gate bias is better understood by examining Figure 4.

Figure 4: The gate bias is indicated left by colored points and matching gain and efficiency curves are shown right. Since gain flatness is desired to avoid AM-AM distortion, a suitable trade-off is found by biasing the gate for class AB operation.
Figure 4: The gate bias is indicated left by colored points and matching gain and efficiency curves are shown right. Since gain flatness is desired to avoid AM-AM distortion, a suitable trade-off is found by biasing the gate for class AB operation.

When the gate is biased for half-wave rectification, as in class B operation, there is significant gain expansion during the conduction part of the signal. On the other hand, class A operation (dotted point in Figure 4) continues to offer flat gain but poor efficiency.

A suitable tradeoff lies in class AB operation in which the gate bias lies somewhere in the region between that for class A and class B such that the conduction angle is greater than π but less 2π.

Figure 5: The gate bias selection also depends on the expected input signal amplitude.
Figure 5: The gate bias selection also depends on the expected input signal amplitude.

Within the class AB region, engineers must consider the expected input signal amplitude or its peak value when choosing the gate bias. When the input signal is small, and the gate is biased just above pinch-off, the device appears linear (Figure 5). However, this is often not the case with power amplifiers.

With the three main non-idealities related to transistors considered, the maximum efficiencies offered by the various amplifier classes start to look very different (Figure 6).

Figure 6: Efficiency degradation in various amplifier classes due to transistor non-idealities.
Figure 6: Efficiency degradation in various amplifier classes due to transistor non-idealities.

Class-B efficiency, which takes a hit from the knee voltage issue, gets a bump up from the soft turn-on. This, however, does not consider the tradeoff in efficiency that would be required to handle the problem of gain expansion.

Notice also that class AB operation appears to offer the least dramatic changes in efficiency as non-idealities are considered.

Additional non-idealities

The structural layers and junctions in transistors give rise to other non-ideal properties – parasitic capacitances and resistances as shown in Figure 7. Whereas the series and shunt resistances cause voltage drop and losses that further impact efficiency, the parasitic capacitances cause distortion.

The three main parasitic capacitances in RF power transistors are those at input or Ciss (Cgd + Cgs), output or Coss (Cds + Cgs), and feedback or Crss, which is also the gate-to-drain capacitance Cgd. The big challenge in accounting for these capacitances is that they are non-linearly voltage dependent.

Figure 7: Device parasitic resistances, inductances and capacitances (left) cause phase change that varies with output power (right).
Figure 7: Device parasitic resistances, inductances and capacitances (left) cause phase change that varies with output power (right).

What’s more, the device interconnects themselves also act as inductances that become significant at high frequencies approaching 1 GHz and beyond, which are typical of today’s wireless communications standards.

The nonlinear capacitors or varactors contribute to phase distortions that vary nonlinearly with output power and make the parasitic L-C-R combinations difficult to manage during RF PA design.

The resulting amplitude to phase (AM-PM) distortions combined with the AM-AM variation earlier discussed can result in incorrect symbols, and therefore information, being transmitted by digital communications systems.

Peak efficiency

Recall the theoretical efficiencies calculated for class A, class B and class F amplifiers in the second part of this series. Note that these were calculated at peak input signal levels. In reality the signal spends a considerable time below peak, resulting in a much lower average power that coincides with the peak signal probability density (Figure 8).

Peak efficiency, on the hand, is achieved at peak output power. Although it is desirable get the best efficiency out of the RF PA at all times, the operating point must be below peak output power so that signal excursions do not exceed the maximum permissible level.

Figure 8: Power efficiency as a function of the output power. Peak efficiency is achieved at peak output power levels.
Figure 8: Power efficiency as a function of the output power. Peak efficiency is achieved at peak output power levels.

What makes this more challenging is that today’s digital communications standards use modulation schemes that allow for considerable variation in the input signal and demand a high peak-to-average power ratio (PAPR).

This has required engineers to employ configurations like the Doherty amplifier, which parallels two PAs: “main” and “auxiliary”. The “main” amplifier typically biased in class-AB is load-tuned to provide high efficiency near the average power. The “auxiliary” amplifier, biased below pinch-off, turns on only at the higher power range creating a load-modulation effect to keep the efficiency high all the way to peak power. Another remedy, called “envelope tracking”, uses envelope-derived modulation of the supply voltage — dynamically controlling the supply voltage — of a conventional RF PA.

Choose tradeoffs to suit application

The non-ideal behavior of transistors varies considerably with the underlying semiconductor technology. For instance, devices based on the wide bandgap material Gallium Nitride (GaN) address the knee voltage issue, offer considerably lower parasitic capacitances, higher operating frequency, and higher power density compared to LDMOS.

While LDMOS performance is limited to lower frequencies, GaN is 10-to-15-percent more efficient at higher frequencies, such as 3.5 GHz applications. Fabricated on a SiC substrate, GaN devices offer higher thermal conductivity as well, allowing them to run at a higher voltage and higher power density than other technologies, which in turn also addresses end-equipment size considerations.

It is essential therefore to understand the application requirements, and accordingly choose both the device technology that offers the most appropriate set of non-idealities as well as design tradeoffs, such as those related to gate biasing.

To learn more about RF PA design considerations and many other topics, view the resources available in Wolfspeed’s Knowledge Center.

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